Title :
Model reuse through hardware design patterns
Author :
Rincón, Fernando ; Moya, Francisco ; Barba, Jesús ; Lopez, J.C.
Author_Institution :
Univ. de Castilla-La Mancha, Ciudad Real, Spain
Abstract :
Increasing reuse opportunities is a well-known problem for software designers as well as for hardware designers. Nonetheless, current software and hardware engineering practices have embraced different approaches to this problem. Software designs are usually modelled after a set of proven solutions to recurrent problems called design patterns. This approach differs from the component-based reuse usually found in hardware designs: design patterns do not specify unnecessary implementation details. Several authors have already proposed translating structural design patterns concepts to hardware design. In this paper we extend the discussion to behavioural design patterns. Specifically, we describe how the hardware version of the Iterator can be used to enhance model reuse.
Keywords :
electronic design automation; hardware description languages; industrial property; object-oriented methods; system-on-chip; Iterator; SoC; VHDL; behavioural design patterns; hardware design; hardware design patterns; intellectual property; model reuse; software design; Algorithm design and analysis; Design optimization; Hardware design languages; High level synthesis; Process design; Productivity; Resource management; Software design; Software engineering; Standardization;
Conference_Titel :
Design, Automation and Test in Europe, 2005. Proceedings
Print_ISBN :
0-7695-2288-2
DOI :
10.1109/DATE.2005.209