DocumentCode :
2588020
Title :
Defect aware test patterns
Author :
Tang, Huaxing ; Chen, Gang ; Reddy, Sudhakar M. ; Wang, Chen ; Rajski, Janusz ; Pomeranz, Irith
Author_Institution :
Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
fYear :
2005
fDate :
7-11 March 2005
Firstpage :
450
Abstract :
A method to generate test patterns referred to as defect aware test patterns is proposed. Defect aware test patterns increase the ability to detect unmodeled defects. The proposed method can be used with any test generation procedure to improve the effectiveness of the tests in detecting unmodeled defects. Experimental results on several industrial designs show the effectiveness of defect aware tests. We also propose a measure to estimate the effectiveness of given test sets in detecting unmodeled defects.
Keywords :
automatic test pattern generation; integrated circuit testing; semiconductor device testing; VLSI circuits; defect aware ATPG; defect aware test pattern generation; test generation procedure; unmodeled defects; Automatic testing; Design automation; Europe;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe, 2005. Proceedings
ISSN :
1530-1591
Print_ISBN :
0-7695-2288-2
Type :
conf
DOI :
10.1109/DATE.2005.110
Filename :
1395603
Link To Document :
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