DocumentCode :
2588490
Title :
Evaluation of a refinement-driven systemC™-based design flow
Author :
Schubert, Thorsten ; Hanisch, Jurgen ; Gerlach, Joachim ; Appell, Jens-E ; Nebel, Wolfgang
Author_Institution :
OFFIS Res. Inst., Oldenburg, Germany
Volume :
3
fYear :
2004
fDate :
16-20 Feb. 2004
Firstpage :
262
Abstract :
This paper describes the experiences and results that were made with a systemC-based design flow for the implementation of an automotive digital hardware design. We present the refinement process starting from an initial high-level executable specification in C++ via systemC down to a gate-level description. We compare the synthesis results of the systemC-based system-level design flow with those from a traditional VHDL-based register-transfer level design flow in terms of efficiency and simulation performance.
Keywords :
high level languages; specification languages; VHDL based register transfer level design flow; automotive digital hardware design; gate level description; hardware description languages; high level executable specification; refinement driven systemC™ based design flow; refinement process; Automatic testing; Design automation; Europe; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings
ISSN :
1530-1591
Print_ISBN :
0-7695-2085-5
Type :
conf
DOI :
10.1109/DATE.2004.1269245
Filename :
1269245
Link To Document :
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