DocumentCode :
258852
Title :
H.264/AVC hardware encoders and low-power features
Author :
Ngoc-Mai Nguyen ; Beigne, Edith ; Lesecq, Suzanne ; Duy-Hieu Bui ; Nam-Khanh Dang ; Xuan-Tu Tran
Author_Institution :
LETI, CEA, Grenoble, France
fYear :
2014
fDate :
17-20 Nov. 2014
Firstpage :
77
Lastpage :
80
Abstract :
Because of significant bit rate reduction in comparison to the previous video compression standards, the H.264/AVC has been successfully used in a wide range of applications. In hardware design for H.264/AVC video encoders, power reduction is currently a tremendous challenge. This paper presents a survey of different H.264/AVC hardware encoders focusing on power features and power reduction techniques to be applied. A new H.264/AVC hardware encoder, named VENGME, is proposed. This low power encoder is a four-stage architecture with memory access reduction, in which, each module has been optimized. The actual total power consumption, estimated at RTL level, is 19.1mW.
Keywords :
data compression; low-power electronics; video codecs; video coding; H.264-AVC; VENGME; hardware encoders; low power encoder; memory access reduction; power 19.1 mW; power features; power reduction techniques; video compression standards; video encoders; Decision support systems; Hafnium; H.264 encoder; HW architecture; power feature;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (APCCAS), 2014 IEEE Asia Pacific Conference on
Conference_Location :
Ishigaki
Type :
conf
DOI :
10.1109/APCCAS.2014.7032723
Filename :
7032723
Link To Document :
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