DocumentCode
2588675
Title
An efficient BICS design for SEUs detection and correction in semiconductor memories
Author
Gill, Balkaran ; Nicolaidis, Michael ; Wolff, Francis ; Papachristou, Chris ; Garverick, Steven
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., Case Western Reserve Univ., Cleveland, OH, USA
fYear
2005
fDate
7-11 March 2005
Firstpage
592
Abstract
We propose a new built-in current sensor (BICS) to detect single event upsets (SEUs) in SRAM. The BICS is designed and validated for 100 nm process technology. The BICS reliability analysis is provided for process, voltage and temperature variations, and power supply noise. The BICS detects various shapes of current pulses generated due to particle strike. The BICS power consumption and area overhead are also provided. The BICS is found to be very reliable for process, voltage and temperature variations and under stringent noise conditions.
Keywords
SRAM chips; electric sensing devices; integrated circuit design; integrated circuit reliability; microsensors; power consumption; random noise; 100 nm; SRAM single event upset detection; area overhead; built-in current sensor design; current pulse shapes; particle strike; power consumption; power supply noise; process variation; reliability analysis; semiconductor memories; temperature variation; voltage variation; Event detection; Noise shaping; Power supplies; Random access memory; Semiconductor device noise; Semiconductor memory; Single event transient; Single event upset; Temperature sensors; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe, 2005. Proceedings
ISSN
1530-1591
Print_ISBN
0-7695-2288-2
Type
conf
DOI
10.1109/DATE.2005.54
Filename
1395633
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