Title :
An iterative algorithm for battery-aware task scheduling on portable computing platforms
Author :
Khan, Jawad ; Vemuri, Ranga
Author_Institution :
Dept. of Electr. Comput. & Eng. Comput. Sci., Cincinnati Univ., OH, USA
Abstract :
We consider battery powered portable systems which either have field programmable gate arrays (FPGA) or voltage and frequency scalable processors as their main processing element. An application is modeled in the form of a precedence task graph at a coarse level of granularity. We assume that, for each task in the task graph, several unique design-points are available which correspond to different hardware implementations for FPGAs and different voltage-frequency combinations for processors. It is assumed that performance and total power consumption estimates for each design-point are available for any given portable platform, including the power usage of peripheral components, such as memory and display. We present an iterative heuristic algorithm which finds a sequence of tasks along with an appropriate design-point for each task, such that a deadline is met and the amount of battery energy used is as small as possible. A detailed illustrative example, along with a case study of a real-world application of a robotic arm controller which demonstrates the usefulness of our algorithm, is also presented.
Keywords :
energy conservation; field programmable gate arrays; graph theory; iterative methods; microprocessor chips; parameter estimation; portable computers; power consumption; scheduling; task analysis; FPGA; battery energy; battery lifetime maximization; battery powered portable systems; battery-aware task scheduling; field programmable gate arrays; frequency scalable processors; granularity; hardware implementations; iterative algorithm; iterative heuristic algorithm; portable computing platforms; power consumption estimation; precedence task graph; robotic arm controller; voltage scalable processors; voltage-frequency combinations; Batteries; Energy consumption; Field programmable gate arrays; Frequency; Hardware; Iterative algorithms; Portable computers; Power system modeling; Processor scheduling; Voltage;
Conference_Titel :
Design, Automation and Test in Europe, 2005. Proceedings
Print_ISBN :
0-7695-2288-2
DOI :
10.1109/DATE.2005.62