Title :
Multithreaded extension to multicluster VLIW processors for embedded applications
Author :
Barretta, Domenico ; Fornaciari, William ; Sami, Mariagiovanna ; Bagni, Daniele
Author_Institution :
Dipt. di Elettronica e Inf., Politecnico di Milano, Italy
Abstract :
Instruction level parallelism (ILP) extraction for multicluster VLIW processors is a very hard task. In this paper, we propose a retargetable architecture that can exploit ILP and thread level parallelism jointly, thus allowing an easier parallelism extraction and improving the performance with respect to traditional multicluster VLIW processors.
Keywords :
embedded systems; multi-threading; parallel architectures; performance evaluation; ILP; embedded applications; instruction level parallelism; multicluster VLIW processors; multithreaded extension; performance; retargetable architecture; thread level parallelism; Computer architecture; Counting circuits; Dynamic scheduling; Parallel architectures; Parallel processing; Processor scheduling; Registers; Switches; VLIW; Yarn;
Conference_Titel :
Design, Automation and Test in Europe, 2005. Proceedings
Print_ISBN :
0-7695-2288-2
DOI :
10.1109/DATE.2005.219
