DocumentCode
2589700
Title
FORAY-GEN: automatic generation of affine functions for memory optimizations
Author
Issenin, Ilya ; Dutt, Nikil
Author_Institution
Donald Bren Sch. of Inf. & Comput. Sci., California Univ., Irvine, CA, USA
fYear
2005
fDate
7-11 March 2005
Firstpage
808
Abstract
In today´s embedded applications, a significant portion of energy is spent in the memory subsystem. Several approaches have been proposed to minimize this energy, including the use of scratch pad memories, with many based on static analysis of a program. However, it is often not possible to perform static analysis and optimization of a program´s memory access behavior unless the program is specifically written for this purpose. We introduce the FORAY model of a program that permits aggressive analysis of the application´s memory behavior that further enables such optimization since it consists of ´for´ loops and array accesses which are easily analyzable. We present FORAY-GEN, an automated profile-based approach for extraction of the FORAY model from the original program. We also demonstrate how FORAY-GEN enhances applicability of other memory subsystem optimization approaches, resulting in an average doubling in the number of memory references that can be analyzed by existing static approaches.
Keywords
embedded systems; optimisation; storage management; array accesses; automatic affine function generation; embedded applications; for loops; memory behavior; memory optimization; memory references; scratch pad memories; static program analysis; Application software; Delay; Embedded computing; Energy consumption; Performance analysis; Scanning probe microscopy;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe, 2005. Proceedings
ISSN
1530-1591
Print_ISBN
0-7695-2288-2
Type
conf
DOI
10.1109/DATE.2005.157
Filename
1395678
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