DocumentCode :
2589706
Title :
Optimized strained Si/strained Ge dual-channel heterostructures for high mobility P- and N-MOSFETs
Author :
Lee, M.L. ; Fitzgerald, E.A.
Author_Institution :
Dept. of Mater. Sci. & Eng., MIT, Cambridge, MA, USA
fYear :
2003
fDate :
8-10 Dec. 2003
Abstract :
Strained Si/strained Ge double heterostructures grown on relaxed Si/sub 1-x/Ge/sub x/ can be used to fabricate extremely high mobility P-MOSFETs. We present the first mobility results to date on N-MOSFETs fabricated on these heterostructures. By optimizing the layer thicknesses and strain, we have demonstrated hole and electron mobility enhancements of 10 and 1.8 times, respectively. Our work also shows that the electron mobility in these heterostructures cannot be increased by allowing electrons to populate the buried Ge.
Keywords :
Ge-Si alloys; MOSFET; electron mobility; elemental semiconductors; germanium; hole mobility; semiconductor materials; silicon; N-MOSFET; Si-Ge-SiGe; electron mobility enhancement; high mobility P-MOSFET; hole mobility; layer thickness optimization; relaxed SiG; strain optimization; strained Si/strained Ge dual-channel heterostructures; CMOS technology; Capacitive sensors; Charge carrier processes; Effective mass; Electron mobility; MOSFET circuits; Materials science and technology; Surface waves; Tensile strain; Wave functions;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-7872-5
Type :
conf
DOI :
10.1109/IEDM.2003.1269314
Filename :
1269314
Link To Document :
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