DocumentCode :
2589776
Title :
Locally strained ultra-thin channel 25nm narrow FDSOI devices with metal gate and mesa isolation
Author :
Krivokapic, Z. ; Moroz, V. ; Maszara, W. ; Lin, M.-R.
Author_Institution :
Technol. Res. Group, Adv. Micro Devices Inc., Sunnyvale, CA, USA
fYear :
2003
fDate :
8-10 Dec. 2003
Abstract :
Strained silicon devices offer very high carrier mobility. If we put them on an SOI substrate we also improve short-channel control and junction leakage. In this paper, we present a new approach to introducing strain in very thin silicon layers. NMOS and PMOS CV/I performance of 0.2 ps and 0.3 ps, respectively, is the highest reported. We analyze 3D geometrical effects on stress, mobility, and drive currents using the 3D process and device simulator, Taurus.
Keywords :
MOSFET; carrier mobility; semiconductor device models; silicon-on-insulator; 0.2 ps; 0.3 ps; 25 nm; 3D geometrical effects; CV/I performance; NMOS; NiSi; PMOS; SOI substrate; carrier mobility; drive current; junction; locally strained FDSOI devices; metal gate mesa isolation; short-channel control; strained silicon devices; stress; ultra-thin channel narrow FDSOI devices; Capacitive sensors; Dielectric devices; Image converters; Implants; Isolation technology; MOS devices; Silicon; Stress; Temperature; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-7872-5
Type :
conf
DOI :
10.1109/IEDM.2003.1269318
Filename :
1269318
Link To Document :
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