Operational and reliability comparison of discrete-storage nonvolatile memories: advantages of single- and double-layer metal nanocrystals

Author

Chungho Lee ; Gorur-Seetharam, A. ; Kan, E.C.

Author_Institution

Sch. of Electr. & Comput. Eng., Cornell Univ., Ithaca, NY, USA

fYear

2003

fDate

8-10 Dec. 2003

Abstract

Aggressive scaling of EEPROM to below 1,000 nm/sup 2/ bit area will enable more applications as low-power mobile systems. We have performed a critical comparison on discrete charge storage nodes, and established the advantages of metal nanocrystals in terms of programming/retention design trade-off and long-term endurance.

Keywords

EPROM; integrated circuit design; integrated circuit reliability; integrated circuit testing; integrated memory circuits; low-power electronics; nanoelectronics; nanostructured materials; EEPROM scaling; bit area; discrete charge storage nodes; discrete-storage nonvolatile memories; double-layer metal nanocrystals; long-term endurance; low-power mobile systems applications; metal nanocrystals; operational comparison; programming/retention design trade-off; reliability comparison; single-layer metal nanocrystals; Chemical vapor deposition; EPROM; Electron beams; Gold; Nanocrystals; Nonvolatile memory; Potential well; Rapid thermal annealing; Self-assembly; Tunneling;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International

Conference_Location

Washington, DC, USA

Print_ISBN

0-7803-7872-5

Type

conf

DOI

10.1109/IEDM.2003.1269344

Filename

1269344