On the detection of delay faults starting from a functional description of a sequential circuit

Testing of delay faults in sequential circuits is the main topic of this paper. The proposed testing methodology exploits at first the possibility of a functional approach, thus, some relationships between a functional fault model and the gate level delay fault model are illustrated. The cooperation between a combinational test pattern generator (TPG), working at the gate level, and a functional TPG is illustrated. Such a proposed test strategy achieves the full fault coverage, as shown with a set of benchmarks