Title :
CMOS overcurrent test: BIC-monitor design, circuit partitioning and test patterns
Author :
Vierhaus, H.T. ; Muhlack, L. ; Gläser, U.
Author_Institution :
German Nat. Res. Center for Comput. Sci., St. Augustin, Germany
Abstract :
The successful implementation of built-in current monitoring circuitry is the key to the practical applicability of defect-oriented CMOS test via current effects. However, inherent constraints due to dynamic effects and the overhead for large chips are still open problems. This paper introduces a novel current monitor design, provides guidelines for circuit partitioning into current-monitor blocks and gives realistic numbers of test patterns for current-versus voltage test
Keywords :
CMOS integrated circuits; circuit layout; integrated circuit testing; BIC-monitor design; CMOS overcurrent test; built-in current monitoring circuitry; circuit partitioning; current-monitor blocks; dynamic effects; inherent constraints; test patterns; Bipolar transistors; CMOS technology; Circuit faults; Circuit testing; Delay effects; Impedance; Monitoring; Proposals; System testing; Voltage;
Conference_Titel :
EUROMICRO 94. System Architecture and Integration. Proceedings of the 20th EUROMICRO Conference.
Conference_Location :
Liverpool
Print_ISBN :
0-8186-6430-4
DOI :
10.1109/EURMIC.1994.390380
