Title :
The accidental detection index as a fault ordering heuristic for full-scan circuits
Author :
Pomeranz, Irith ; Reddy, Sudhakar M.
Author_Institution :
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
Abstract :
We investigate a new fault ordering heuristic for test generation in full-scan circuits. The heuristic is referred to as the accidental detection index. It associates a value ADI(f) with every circuit fault f. The heuristic estimates the number of faults that will be detected by a test generated for f. Fault ordering is done such that a fault with a higher accidental detection index appears earlier in the ordered fault set and targeted earlier during test generation. This order is effective for generating compact test sets, and for obtaining a test set with a steep fault coverage curve. Such a test set has several applications. We present experimental results to demonstrate the effectiveness of the heuristic.
Keywords :
automatic test pattern generation; fault diagnosis; integrated circuit testing; logic testing; accidental detection index; circuit fault value; fault ordering heuristic; full-scan circuits; ordered fault set; targeted fault; test generation; test set fault coverage curve; Circuit faults; Circuit testing; Cities and towns; Compaction; Electrical fault detection; Fault detection; Region 5;
Conference_Titel :
Design, Automation and Test in Europe, 2005. Proceedings
Print_ISBN :
0-7695-2288-2
DOI :
10.1109/DATE.2005.306