Abstract bus interface unit for ESL design from TLM 2.0 communications to the real bus protocol

At electronic system level (ESL), the existing design flow lacks of an effective design methodology to transform transaction level modeling (TLM) communications to the real bus protocol (e.g., the AXI bus protocol). Therefore, after the design is verified through TLM 2.0 simulation, the designers need to spend a lot of human efforts (by themselves) to transform TLM 2.0 communication mechanisms to the real bus protocol for high-level synthesis. Based on this observation, in this paper, we propose the concept of abstract bus interface unit (BIU) for automatic transformation. The main idea of our BIU is to provide built-in functions that realize TLM 2.0 communication mechanisms and the AXI bus protocol, respectively. As a result, the designers only need to use our provided function calls to perform communications and do not need to worry about any implementation detail. Moreover, if the designers would like to transform TLM 2.0 communication mechanisms to the AXI bus protocol, they only need to replace some built-in functions. It is noteworthy to mention that our methodology is not limited to the AXI bus protocol (i.e., our methodology can be generalized to any real bus protocol). Experiments on real industry chips show that our approach can greatly save the design time in the ESL design flow.