Title :
Adjacent common centroid placement for analog IC layout design
Author :
Murotatsu, Kenichiro ; Fujiyoshi, Kunihiro
Author_Institution :
Dept. of Electr. & Electron. Eng., Tokyo Univ. of Agric. & Technol., Tokyo, Japan
Abstract :
To improve immunity against process gradients, common centroid constraint, in which every pair of elements should be placed symmetrically with respect to a common center point, is widely used. Several methods to obtain a good placement satisfying the constraint by using sequence-pair and Simulated Annealing were proposed. However, cells in a common centroid group should be placed close to the common center point of the group. In this paper, we propose methods which use mathematical-programming and can place cells in each group close to the common center point, and check the effectiveness of the methods by experimental comparisons.
Keywords :
analogue integrated circuits; integrated circuit layout; mathematical programming; simulated annealing; adjacent common centroid placement; analog IC layout design; mathematical-programming; sequence-pair constraint; simulated annealing; Approximation methods; Capacitance; Capacitors; Integrated circuits; Layout; Linear programming; Silicon;
Conference_Titel :
Circuits and Systems (APCCAS), 2014 IEEE Asia Pacific Conference on
Conference_Location :
Ishigaki
DOI :
10.1109/APCCAS.2014.7032857