• DocumentCode
    2591290
  • Title

    An efficient sequential SAT solver with improved search strategies

  • Author

    Lu, F. ; Iyer, M.K. ; Parthasarathy, G. ; Wang, L.-C. ; Cheng, K.-T. ; Chen, K.C.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., California Univ., Santa Barbara, CA, USA
  • fYear
    2005
  • fDate
    7-11 March 2005
  • Firstpage
    1102
  • Abstract
    A sequential SAT solver, Satori, was recently proposed (Iyer, M.K. et al., Proc. IEEE/ACM Int. Conf. on Computer-Aided Design, 2003) as an alternative to combinational SAT in verification applications. This paper describes the design of Seq-SAT, an efficient sequential SAT solver with improved search strategies over Satori. The major improvements include: (1) a new and better heuristic for minimizing the set of assignments to state variables; (2) a new priority-based search strategy and a flexible sequential search framework which integrates different search strategies; (3) a decision variable selection heuristic more suitable for solving the sequential problems. We present experimental results to demonstrate that our sequential SAT solver can achieve orders-of-magnitude speedup over Satori. We plan to release the source code of Seq-SAT.
  • Keywords
    computability; electronic design automation; logic design; logic testing; network synthesis; search problems; circuit design; circuit verification; combinational SAT; decision variable selection heuristic; flexible sequential search framework; satisfiability solver; search strategies; sequential SAT solver; sequential justification; state variables; Automatic test pattern generation; Circuit synthesis; Combinational circuits; Flip-flops; Input variables; Sequential circuits;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe, 2005. Proceedings
  • ISSN
    1530-1591
  • Print_ISBN
    0-7695-2288-2
  • Type

    conf

  • DOI
    10.1109/DATE.2005.55
  • Filename
    1395740