Title :
Physical mechanism for high hole mobility in [110]-surface strained- and unstrained-MOSFETs
Author :
Mizuno, T. ; Sugiyama, N. ; Tezuka, T. ; Moriyama, Y. ; Nakaharai, S. ; Maeda, T. ; Takagi, S.
Author_Institution :
MIRAI-ASET, Kawasaki, Japan
Abstract :
In this paper, in order to evaluate the higher hole mobility of the [110]-surface devices against that of the [100]-surface MOSFETs, we have studied the [110]-surface hole mobility behaviors of thin film (TF) strained-SOI, unstrained-SOI, and unstrained-bulk MOSFETs in detail, as functions of E/sub eff/, current flow direction, and temperature. We have introduced a model for [110]-surface hole mobility. We discuss the V/sub th/ control of the strained-SOIs by applying the back-gate bias under the buried oxide without controlling the channel dopant, as well as the transconductance enhancement down to the quarter-micron region. A device design concept for strained-CMOS is proposed to optimize the channel surface orientation and the drain current flow direction of n- and p-MOSFETs.
Keywords :
MOSFET; crystal orientation; hole mobility; semiconductor device models; silicon-on-insulator; [100]-surface MOSFET; [110]-surface MOSFET; buried oxide back-gate bias; channel dopant; channel surface orientation; current flow direction; drain current flow direction; hole mobility; n-MOSFET; p-MOSFET; strained-CMOS; surface strained MOSFET; thin film strained SOI; transconductance enhancement; unstrained MOSFET; unstrained SOI; Charge carrier mobility; MOSFETs; Semiconductor device modeling; Silicon on insulator technology;
Conference_Titel :
Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-7872-5
DOI :
10.1109/IEDM.2003.1269403
