DocumentCode :
2592368
Title :
A micro-power low-noise auto-zeroing CMOS amplifier for cortical neural prostheses
Author :
Chan, Chiu-Hsien ; Wills, Jack ; LaCoss, Jeff ; Granacki, John J. ; Choma, John, Jr.
Author_Institution :
Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA
fYear :
2006
fDate :
Nov. 29 2006-Dec. 1 2006
Firstpage :
214
Lastpage :
217
Abstract :
A novel architecture to realize a low-power, low-noise amplifier for cortical neural prostheses is presented. The design consists of a low-noise variable gain amplifier as the first stage, a low-Gm high-pass filter as the second stage, and a low-pass Gm-C amplifier as the last stage. Discrete-time autozeroing is utilized to reduce the offset and noise. The bandwidth and autozeroing frequency of the amplifier is optimized to reduce noise folding. A current division technique is utilized to achieve a low-Gm OTA (Operational Transconductance Amplifier) so that low frequency operation is realized without any external capacitors. All the input pair transistors are biased in sub-threshold operation to reduce power consumption. A cross-couple parallel pair of source degeneration transistors is employed to increase the linearity crucial to neural spike detection. This design achieves variable gain from 470 (55 dB) to 1. In a CMOS 0.18 um process with 1.8 V power supply, the total circuit occupies 0.245 mm2 with 26 uW power consumption and 1.8 kHz bandwidth. Total harmonic distortion is less than 1%, while input noise is 4.24 uVrms within the band of interest.
Keywords :
CMOS integrated circuits; MOSFET; bioelectric potentials; biomedical electronics; brain; capacitors; high-pass filters; low noise amplifiers; low-power electronics; neurophysiology; operational amplifiers; prosthetics; autozeroing frequency; cortical neural prostheses; current division technique; frequency 1.8 kHz; input pair transistors; low-Gm OTA; low-Gm high-pass filter; low-noise variable gain amplifier; low-pass Gm-C amplifier; micropower low-noise auto-zeroing CMOS amplifier; neural spike detection; noise folding reduction; operational transconductance amplifier; power 26 muW; power consumption reduction; size 0.18 mum; source degeneration transistors; sub-threshold operation; total harmonic distortion; voltage 1.8 V; Bandwidth; Energy consumption; Filters; Frequency; Gain; Low-frequency noise; Low-noise amplifiers; Noise reduction; Prosthetics; Transconductance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Biomedical Circuits and Systems Conference, 2006. BioCAS 2006. IEEE
Conference_Location :
London
Print_ISBN :
978-1-4244-0436-0
Electronic_ISBN :
978-1-4244-0437-7
Type :
conf
DOI :
10.1109/BIOCAS.2006.4600346
Filename :
4600346
Link To Document :
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