Title :
Hardware acceleration of hidden Markov model decoding for person detection
Author :
Fahmy, Suhaib A. ; Cheung, Peter Y K ; Luk, Wayne
Author_Institution :
Dept. of Electr. & Electron. Eng., Imperial Coll. London, UK
Abstract :
This paper explores methods for hardware acceleration of hidden Markov model (HMM) decoding for the detection of persons in still images. Our architecture exploits the inherent structure of the HMM trellis to optimise a Viterbi decoder for extracting the state sequence front observation features. Further performance enhancement is obtained by computing the HMM trellis states in parallel. The resulting hardware decoder architecture is mapped onto a field programmable gate array (FPGA). The performance and resource usage of our design is investigated for different levels of parallelism. Performance advantages over software are evaluated. We show how this work contributes to a real-time system for person-tracking in video-sequences.
Keywords :
Viterbi decoding; feature extraction; field programmable gate arrays; hidden Markov models; image recognition; parallel architectures; state estimation; FPGA; HMM decoding; HMM trellis; Viterbi decoder optimisation; hidden Markov models; observation feature state sequence extraction; parallel computation; person detection hardware acceleration; real-time video-sequence person-tracking; still image person detection; Acceleration; Computer architecture; Concurrent computing; Decoding; Field programmable gate arrays; Hardware; Hidden Markov models; Parallel processing; Software performance; Viterbi algorithm;
Conference_Titel :
Design, Automation and Test in Europe, 2005. Proceedings
Print_ISBN :
0-7695-2288-2
DOI :
10.1109/DATE.2005.169