DocumentCode
2592405
Title
Hardware implementation in DGPS accuracy improvement by using RSCMAC
Author
Chiang, Ching-Tsan ; Hsu, Jih-Sheng ; Yang, Sheng-Jie
Author_Institution
Dept. of Electr. Eng. Dept., Ching Yun Univ., Jungli, Taiwan
Volume
4
fYear
2011
fDate
15-17 Oct. 2011
Firstpage
2260
Lastpage
2266
Abstract
The purpose of this research is to develop and apply the “Recurrent S_CMAC_GBF (RSCMAC) [2] to enhance the accuracy of Global Positioning System (GPS). The performance is implemented and tested by a FPGA chip. In the research, the previous work has accomplished outstanding performance by using RSCMAC to predict GPS receiver static error to improve the error of the Differential-GPS. The simulation result shows 10 times accuracy is improved - GPS error is improved from larger than 20M to less than 2M. This paper employs previous research result to whole area prediction (non single fixed position), and then implements the performance by a FPGA chip. The key point is to commercialize the prototype design and its development. The most advantage of this project is to improve inexpensive GPS receiver positioning errors to increase the economic benefit of higher accuracy.
Keywords
Global Positioning System; error analysis; field programmable gate arrays; neural nets; radio receivers; DGPS; FPGA chip; RSCMAC; cerebellar model articulation controller; differential global positioning system; hardware implementation; receiver positioning errors; recurrent S_CMAC_GBF; Accuracy; Field programmable gate arrays; Global Positioning System; Hardware; Receivers; Roads; Satellites; DGPS; Hardware Implementation; RSCMAC;
fLanguage
English
Publisher
ieee
Conference_Titel
Biomedical Engineering and Informatics (BMEI), 2011 4th International Conference on
Conference_Location
Shanghai
Print_ISBN
978-1-4244-9351-7
Type
conf
DOI
10.1109/BMEI.2011.6098782
Filename
6098782
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