Title :
FPGA based agile algorithm-on-demand coprocessor
Author :
Pradeep, R. ; Vinay, S. ; Burman, Sanjay ; Kamakoti, V.
Author_Institution :
Dept. of Comput. Sci., Indian Inst. of Technol. Madras, Chennai, India
Abstract :
With the growing computational needs of many real-world applications, frequently changing specifications of standards, and the high design and NRE costs of ASICs, an algorithm-agile FPGA based coprocessor has become a viable alternative. We report the general design of an algorithm-agile coprocessor and the proof-of-concept implementation.
Keywords :
coprocessors; field programmable gate arrays; integrated circuit design; logic design; ASIC; FPGA; agile algorithm-on-demand coprocessor; algorithm-agile coprocessor; proof-of-concept implementation; Algorithm design and analysis; Application software; Computer architecture; Computer science; Coprocessors; Field programmable gate arrays; Microcontrollers; Read only memory; Read-write memory; Reconfigurable logic;
Conference_Titel :
Design, Automation and Test in Europe, 2005. Proceedings
Print_ISBN :
0-7695-2288-2
DOI :
10.1109/DATE.2005.160
