Grid synchronization system for power converters

Author

Neto, João A Moor ; Lovisolo, Lisandro ; França, Bruno W. ; Aredes, Maurício

Author_Institution

DEPEL, CEFET-RJ, Rio de Janeiro, Brazil

fYear

2009

fDate

Sept. 27 2009-Oct. 1 2009

Firstpage

749

Lastpage

755

Abstract

In this paper, is proposed a new three-phase synchronization algorithm having a fast dynamic response and robust performance under distortion and/or fault conditions. Details on the structure and the digital implementation are provided. In order to validate the effectiveness of the three-phase phase-locked loop (PLL) algorithm, simulations using PSCAD/EMTDC are presented, under conditions that are similar to the ones encountered in practical digital implementations as low sampling rate and fixed-point arithmetic. Experimental results using a fixed-point DSP are presented as well.

Keywords

fault diagnosis; fixed point arithmetic; phase locked loops; power convertors; power grids; PLL algorithm; PSCAD-EMTDC; fixed-point arithmetic; grid synchronization system; power converters; three-phase phase-locked loop; Digital signal processing; Fixed-point arithmetic; Frequency estimation; Frequency measurement; Frequency synchronization; PSCAD; Phase detection; Phase locked loops; Power system dynamics; Voltage; DSP; Fixed-Point; PLL; Positive-Sequence Voltage; Synchronization;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Electronics Conference, 2009. COBEP '09. Brazilian

Conference_Location

Bonito-Mato Grosso do Sul

ISSN

2175-8603

Print_ISBN

978-1-4244-3369-8

Electronic_ISBN

2175-8603

Type

conf

DOI

10.1109/COBEP.2009.5347692

Filename

5347692