Title :
High Level Synthesis Of Globally Asynchronous Locally Synchronous Circuits
Author :
Wolinski, Krzysztof ; Belhadj, Mohammed
Author_Institution :
IRISA
fDate :
30 Jun-1 Jul 1994
Keywords :
Circuit synthesis; Clocks; Delay; Design automation; High level synthesis; Kernel; Metastasis; Robustness; Signal synthesis; Very large scale integration;
Conference_Titel :
Test Workshop, 1994. ATW '94. The Third Annual Atlantic
DOI :
10.1109/ATW.1994.747847
