Title : 
An Analysis of the Relationship between a Write Access Reduction Method for NVM/DRAM Hybrid Memory with Programming Language Runtime Support and Execution Policies of Garbage Collection
         
        
            Author : 
Nakagawa, Goji ; Oikawa, S.
         
        
            Author_Institution : 
Dept. of Comput. Sci., Univ. of Tsukuba, Tsukuba, Japan
         
        
        
            fDate : 
Aug. 31 2014-Sept. 4 2014
         
        
        
        
            Abstract : 
There are several research projects about new generation non-volatile memory (NVM), such as STT-MRAM, PCM and ReRAM. Non-volatile main memory makes it possible to integrate secondary storages in main memory. The integration enables to reduce I/O to slow block devices. It is, however, impossible to construct large capacity main memory with a single NVM in this point. It is required to combine DRAM and NVM or combine NVM and another NVM to construct unified non-volatile main memory. The previous researches discussed NVM/DRAM hybrid main memory architecture, which combine PCM and DRAM. In our previous work, we proposed a method to manage NVM/DRAM hybrid main memory with programming language runtimes supports. Language runtimes, such as Java runtimes, have more detailed informaion about write acceess to data than operating system has. The language runtime supports are useful to manage NVM/DRAM hybrid memory therefore. In the proposed method, the runtime migrates objects between NVM and DRAM based on the characteristics of write access. The language runtime executes the migration processes during garbage collection processes. The performance of the proposed method rely on the frequency of garbage collection. In this paper, we will discuss and do an experiment about how the frequency of garbage collection effects the performance of the proposed method. The results of the experiment shows that the improved method cut 91 percent of write access. The results also show that the improved method cut 50 percent of the usage of DRAM.
         
        
            Keywords : 
DRAM chips; Java; input-output programs; memory architecture; storage management; I/O reduction; Java runtimes; NVM-DRAM hybrid main memory architecture; PCM; ReRAM; STT-MRAM; garbage collection execution policies; nonvolatile main memory; programming language runtime support; secondary storages; write access reduction method; Force; Nonvolatile memory; Operating systems; Random access memory; Resource management; Runtime; Semantics; garbage collection; non-volatile memory; system software;
         
        
        
        
            Conference_Titel : 
Advanced Applied Informatics (IIAIAAI), 2014 IIAI 3rd International Conference on
         
        
            Conference_Location : 
Kitakyushu
         
        
            Print_ISBN : 
978-1-4799-4174-2
         
        
        
            DOI : 
10.1109/IIAI-AAI.2014.128