A two-stage time-to-digital converter based on cyclic pulse shrinking

The design of a novel time-to-digital converter based on the cyclic pulse shrinking method and implemented in an FPGA (field programmable gate array) device is proposed. The pulse shrinking is realized by two complementary delay lines made as built-in carry chains. In the first line the noninverted pulse is being shrunk while in the second one the inverted pulse is being stretched. The converter resolution depends on the length ratio of the lines. To avoid the influence of any circuit element apart from the lines on the resolution, the information about a measured time interval is transmitted between the lines as a time interval between two pulses representing the leading and trailing edges of the original pulse. To increase the precision of converter a two-stage conversion is introduced. The low-resolution first stage shortens substantially the conversion time and provides a wide measurement range whereas the second stage provides a high resolution. The designed two-stage converter has a resolution of 42 ps and the measurement uncertainty below 56 ps within the whole measurement range. The two-stage structure is obtained as modification of a single-stage converter featuring the resolution of 75 ps and the maximum measurement uncertainty of 150 ps, which is also described in this paper.