• DocumentCode
    2594337
  • Title

    Power Scalable Digital Baseband Architecture for IEEE 802.15.4

  • Author

    Dwivedi, Satyam ; Amrutur, Bharadwaj ; Bhat, Navakanta

  • Author_Institution
    ECE Dept., Indian Inst. of Sci., Bangalore, India
  • fYear
    2011
  • fDate
    2-7 Jan. 2011
  • Firstpage
    30
  • Lastpage
    35
  • Abstract
    We propose a power scalable digital base band for a low-IF receiver for IEEE 802.15.4-2006. The digital section´s sampling frequency and bit width are used as knobs to reduce the power under favorable signal and interference scenarios, thus recovering the design margins introduced to handle worst case conditions. We propose tuning of these knobs based on measurements of Signal and the interference levels. We show that in a 0.13u CMOS technology, for an adaptive digital base band section of the receiver designed to meet the 802.15.4 standard specification, power saving can be up to nearly 85% (0.49mW against 3.3mW) in favorable interference and signal conditions.
  • Keywords
    adaptive signal processing; radio receivers; telecommunication standards; CMOS technology; IEEE 802.15.4; low-IF receiver; power scalable digital baseband architecture; Baseband; Finite impulse response filter; Interference; Receivers; Signal to noise ratio; Synchronization; Table lookup; IEEE 802.15.4; Power scalable receiver; low power;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design (VLSI Design), 2011 24th International Conference on
  • Conference_Location
    Chennai
  • ISSN
    1063-9667
  • Print_ISBN
    978-1-61284-327-8
  • Electronic_ISBN
    1063-9667
  • Type

    conf

  • DOI
    10.1109/VLSID.2011.64
  • Filename
    5718773