• DocumentCode
    2594427
  • Title

    A Novel Learning Framework for State Space Exploration Based on Search State Extensibility Relation

  • Author

    Chandrasekar, Maheshwar ; Hsiao, Michael S.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Virginia Tech, Blacksburg, VA, USA
  • fYear
    2011
  • fDate
    2-7 Jan. 2011
  • Firstpage
    64
  • Lastpage
    69
  • Abstract
    Model Checking is an effective method for design verification, useful for proving temporal properties of the underlying system. In model checking, computing the pre-image (or image) space of a given temporal property plays a critical role. In this paper, we propose a novel learning framework for efficient state space exploration based on search state extensibility relation. This allows for the identification and pruning of several non-trivial redundant search spaces, thereby reducing the computational cost. We also propose a probability-based heuristic to guide our learning method. Experimental evidence is given to show the practicality of the proposed method.
  • Keywords
    network synthesis; state-space methods; design verification; learning framework; model checking; pre-image space computation; probability-based heuristic; search state extensibility relation; state space exploration; Boolean functions; Computational modeling; Data structures; Decision trees; Logic gates; Monitoring; Space exploration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design (VLSI Design), 2011 24th International Conference on
  • Conference_Location
    Chennai
  • ISSN
    1063-9667
  • Print_ISBN
    978-1-61284-327-8
  • Electronic_ISBN
    1063-9667
  • Type

    conf

  • DOI
    10.1109/VLSID.2011.57
  • Filename
    5718779