Title :
Improved Timing Windows Overlap Check Using Statistical Timing Analysis
Author :
Shrivastava, Sachin ; Parameswaran, Harindranath
Author_Institution :
Cadence Design Syst., NSEZ, Noida, India
Abstract :
To reduce pessimism in cross talk analysis, a key technique that is employed is the use of timing windows. However, timing windows are associated with corners, hence the use of a single corner timing windows during analysis can lead to optimism. Alternately if the timings windows from best and worst corners are combined to create a wider window, it can lead to excessive pessimism. We propose an approach based on parametrized statistical timing analysis modeling to overcome the shortcomings of the existing approaches, and to account for process variations in the definition of timing-windows. We show that this approach can overcome both the issues in the current approaches.
Keywords :
crosstalk; integrated circuit noise; statistical analysis; timing circuits; cross talk analysis; improved timing windows; parametrized statistical timing analysis modeling; single corner timing windows; Analytical models; Crosstalk; Delay; Electronic mail; Optical wavelength conversion; Switches; Crosstalk; SSTA; Timing Windows;
Conference_Titel :
VLSI Design (VLSI Design), 2011 24th International Conference on
Conference_Location :
Chennai
Print_ISBN :
978-1-61284-327-8
Electronic_ISBN :
1063-9667
DOI :
10.1109/VLSID.2011.21