Title :
A linearized source-couple pair transconductor using a low-voltage square root circuit
Author :
Ngamkham, W. ; Kiatwarin, N. ; Narksap, W. ; Sangpisit, W. ; Kiranon, W.
Author_Institution :
Dept. of Telecommun. Eng., King Mongkut´´s Inst. of Technol. Ladkrabang, Bangkok
Abstract :
This paper presents a CMOS transconductor linearization by connecting square-rooter to a source couple pair circuit. A novel square-rooting circuit is proposed for low voltage operation. The proposed transconductance circuit is compact and consumes lower quiescent power, compared with the existing transconductors using the same realization technique. The circuit performances verification by PSPICE simulations show good results as expected.
Keywords :
CMOS integrated circuits; SPICE; CMOS transconductor linearization; PSPICE simulations; linearized source-couple pair transconductor; low-voltage square root circuit; transconductance circuit; CMOS technology; Circuit simulation; Coupling circuits; Low voltage; Paper technology; Power engineering and energy; SPICE; Transconductance; Transconductors; Virtual colonoscopy;
Conference_Titel :
Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology, 2008. ECTI-CON 2008. 5th International Conference on
Conference_Location :
Krabi
Print_ISBN :
978-1-4244-2101-5
Electronic_ISBN :
978-1-4244-2102-2
DOI :
10.1109/ECTICON.2008.4600527
