DocumentCode :
2595239
Title :
Design of a 20 MHz DC-DC Buck Converter with 84 Percent Efficiency for Portable Applications
Author :
Maity, Ashis ; Patra, Amit ; Yamamura, Norihisa ; Knight, Jonathan
Author_Institution :
Electr. Eng., Indian Inst. of Technol., Kharagpur, India
fYear :
2011
fDate :
2-7 Jan. 2011
Firstpage :
316
Lastpage :
321
Abstract :
This paper presents the design and implementation of a 20 MHz voltage mode DC-DC buck converter with high power efficiency. The power efficiency has been improved by minimising the short circuit current in the driver stage. At the same time, a high gain, wide-band error amplifier topology with reduced current consumption, improves various dynamic performance parameters such as settling time, load and line regulations of the converter. A prototype of a 20 MHz DCDC buck converter is implemented and fabricated in 0.5 μm Bi-CMOS process with a maximum of 600 mA load current driving capability in the input voltage range of 2.7-5.5 V which is suitable for single-cell lithiumion (Li-Ion) battery operated portable applications. A reasonably good settling time of 10 μs is observed in the measured result with off-chip filter components of L=270 nH, C=1.6 μF. The measured value of load regulation and line regulation are 1.6 mV/A and 3 mV/V respectively. A maximum of 84% power efficiency is achieved at 2.7 V to 1.2 V conversion. A very low form factor of 2.5 mm × 2.5 mm × 0.7 mm, has been achieved by using power power flip-chip packaging technology.
Keywords :
BiCMOS analogue integrated circuits; DC-DC power convertors; amplifiers; driver circuits; secondary cells; short-circuit currents; DC-DC buck converter; biCMOS process; capacitance 1.6 muF; current 600 mA; current consumption; efficiency 84 percent; frequency 20 MHz; line regulations; load current driving capability; load regulation; off-chip filter components; portable applications; power efficiency; power flip-chip packaging technology; short circuit current; single-cell lithium-ion battery; size 0.5 mum; time 10 mus; voltage 2.7 V to 5.5 V; wide-band error amplifier topology; Capacitors; Converters; Delay; Driver circuits; Logic gates; Switches; Topology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design (VLSI Design), 2011 24th International Conference on
Conference_Location :
Chennai
ISSN :
1063-9667
Print_ISBN :
978-1-61284-327-8
Electronic_ISBN :
1063-9667
Type :
conf
DOI :
10.1109/VLSID.2011.37
Filename :
5718821
Link To Document :
بازگشت