Title :
The Dual-Banyan (DB) switch: a high-performance buffered-Banyan ATM switch
Author :
Kolias, Christos ; Kleinrock, Leonard
Author_Institution :
Dept. of Comput. Sci., California Univ., Los Angeles, CA, USA
Abstract :
Multistage interconnection networks (MINs) are very popular in ATM switching since they can achieve high-performance switching and are easy to implement and expand due to their modular design. In this paper we present and describe in detail a high-performance buffered-Banyan switch which encompasses multiple input-queueing as its buffering strategy. We call this switching architecture Dual-Banyan switch. Simulation results are given to demonstrate its throughput, mean waiting time and cell-loss performance considering different switch and buffer sizes. We further compare it to the simple, single-queue buffered Banyan network, assuming, for reasons of fairness, the same total buffer capacity with respect to uniform and non-uniform traffic patterns
Keywords :
asynchronous transfer mode; channel capacity; multistage interconnection networks; queueing theory; Dual-Banyan switch; MINs; buffer sizes; buffering strategy; cell-loss performance; high-performance buffered-Banyan ATM switch; mean waiting time; modular design; multiple input-queueing; multistage interconnection networks; simulation; switch sizes; switching architecture; throughput; Asynchronous transfer mode; Computer science; Concurrent computing; Multiprocessor interconnection networks; Packet switching; Sorting; Switches; Tail; Throughput; Very large scale integration;
Conference_Titel :
Communications, 1997. ICC '97 Montreal, Towards the Knowledge Millennium. 1997 IEEE International Conference on
Conference_Location :
Montreal, Que.
Print_ISBN :
0-7803-3925-8
DOI :
10.1109/ICC.1997.609986