Title :
An Access-sequence Control Scheme To Enhance Random Access Performance Of Embedded DRAMs
Author :
Ayukawa, K. ; Watanabe, T. ; Narita, S.
Author_Institution :
Central Research Lab., Hitachi Ltd. Kokubunji, Tokyo, 185 Japan
Conference_Titel :
VLSI Circuits, 1997. Digest of Technical Papers., 1997 Symposium on
Print_ISBN :
4-930813-76-X
DOI :
10.1109/VLSIC.1997.623806
