Title :
3D-TSV vertical interconnection method using Cu/SnAg double bumps
Author :
Paik, Kyung-Wook ; Choi, Yongwon ; Shin, Jiwon
Author_Institution :
Dept. of Mater. Sci. & Eng., KAIST, Daejeon, South Korea
Abstract :
3D-TSV chip staking becomes the ultimate 3D chip stacking technology because of its smallest size and weight, best electrical performance, and potentially lower cost. There have been several 3D-TSV chip to chip vertical interconnection methods such as copper-copper bonding and solder interconnect. In the solder 3D-TSV interconnect, copper/solder double bump structure has been used to interconnect TSV bumps followed by underfill dispensing. However, solder joint electrical shortage between neighboring bumps and underfill dispensing at the very thin 3D-TSV chip stack becomes very challenging issues. In this study, the copper/eutectic solder bump bonding method using pre-applied NCAs was investigated as an alternative 3D-TSV interconnection method. The non-conductive polymer adhesive was pre-applied on 3D-TSV wafers with copper/eutectic solder bumps as a film format resulting in no solder joint electrical shortage problem between neighboring bumps and no extra underfill process. Specially designed NCA materials have been developed to satisfy the polymer resin flow characteristics, solder flux function, fast curing speed, and 3D chip stacking process compatibility. In addition, simple and fast thermo-compression bonding processes have been developed to finish the solder joining and NCA curing at 250°C within 10 seconds. The electrical interconnections mechanism of 3D-TSV stacked chips using copper/solder double bumps and newly developed pre-applied NCAs were investigated and 3D-TSV vertical interconnect using NCAs was successfully demonstrated. The electrical interconnection through the arrays of the bumps between two 3D-TSV test chips showed excellent reliability test results, high temperature storage test (HTST) of 200 hours, pressure cooker test (PCT) of 24 hours, and thermal cycle (T/C) of 200 cycles. As a summary, it was proven that the one step metal/polymer hybrid bonding was very efficient 3D-TSV vertical interconnection method.
Keywords :
adhesive bonding; copper; copper compounds; integrated circuit interconnections; integrated circuit reliability; integrated circuit testing; polymers; resins; solders; three-dimensional integrated circuits; tin compounds; 3D chip stacking process compatibility; 3D-TSV chip staking; 3D-TSV chip to chip vertical interconnection method; 3D-TSV wafer; Cu-SnAg; NCA material; copper-copper bonding; copper-eutectic solder bump bonding method; copper-solder double bump structure; curing speed; electrical interconnections mechanism; electrical performance; film format; high temperature storage test; neighboring bump; nonconductive polymer adhesive; polymer resin flow characteristics; reliability testing; solder flux function; solder interconnect; solder joining; solder joint electrical shortage problem; step metal-polymer hybrid bonding; temperature 250 C; thermo-compression bonding process; time 10 s; time 200 hour; time 24 hour; underfill dispensing; Bonding; Copper; Curing; Polymers; Soldering; Stacking;
Conference_Titel :
Low Temperature Bonding for 3D Integration (LTB-3D), 2012 3rd IEEE International Workshop on
Conference_Location :
Tokyo
Print_ISBN :
978-1-4673-0743-7
DOI :
10.1109/LTB-3D.2012.6238093