FPGA-based neuro-architecture intrusion detection system

These daypsilas intrusion detection systems (IDSs) are playing an essential part of any network security system. A challenging task in designing such IDSs is the ability of detecting the system attacks at a high speed and with an acceptable accuracy. In this work, an IDS system is proposed and designed with two keys of success; its neuro-architecture, and the FPGA-based implementation of this architecture. The neuro-architecture of the proposed system provides not only systempsilas capability of detecting attacks that are not included in the training sets, but also fast decision due to the natural parallelism propriety of the neural networks. Also, the software implementation of the proposed system is explained. Furthermore, an FPGA-based implementation of the system is illustrated to provide an extra enhancement of system speed. Besides, the FPGA-based implementation provides an improved scope of boosting security over the software-based system.