DocumentCode :
2598268
Title :
FPGA implementation of CubeHash, Gr⊘stel, JH, and SHAvite-3 hash functions
Author :
Namin, A.H. ; Li, G. ; Wu, J. ; Xu, J. ; Huang, Y. ; Nam, O. ; Elbaz, R. ; Hasan, M.A.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Waterloo, Waterloo, ON, Canada
fYear :
2010
fDate :
20-23 June 2010
Firstpage :
121
Lastpage :
124
Abstract :
In this work, FPGA implementation of the compression function for four of the second round candidates of the SHA-3 competition are presented. All implementations w ere performed using the same technology and optimization techniques to present a fair comparison between the candidates. Achieved results are compared with similar implementations to provide a comprehensive comparison of candidates performance in hardware.
Keywords :
cryptography; field programmable gate arrays; CubeHash; FPGA implementation; Grøstel; JH; SHAvite-3; compression function; hash functions; optimization; Algorithm design and analysis; Cryptography; Delay; Field programmable gate arrays; Hardware; NIST; Registers; CubeHash; FPGA; Gr⊘stel; Hash functions; JH; SHA-3; SHAvite-3; compression function; hardware implementation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
NEWCAS Conference (NEWCAS), 2010 8th IEEE International
Conference_Location :
Montreal, QC
Print_ISBN :
978-1-4244-6806-5
Electronic_ISBN :
978-1-4244-6804-1
Type :
conf
DOI :
10.1109/NEWCAS.2010.5603723
Filename :
5603723
Link To Document :
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