DocumentCode :
2598323
Title :
A background amplifier offset calibration technique for high-resolution pipelined ADCs
Author :
Ding, Li ; Sin, Sai-Weng ; Seng-Pan, U. ; Martins, R.P.
Author_Institution :
Analog & Mixed Signal VLSI Lab., Univ. of Macau, Macao, China
fYear :
2010
fDate :
20-23 June 2010
Firstpage :
41
Lastpage :
44
Abstract :
This paper describes a novel offset calibration technique of the residue amplifier (RAMP) for pipelined ADCs. The calibration operates in two phases, completely in the background, without requiring any interruption in the operation of the ADC. In the analog coarse correction phase most of the offset is compensated through the injection of a DC signal at RAMP´s input. The digital fine correction phase will eliminate the remaining offset. Simulation results show that with the proposed calibration technique the over-range margin can be released and the SNDR is not degraded.
Keywords :
amplifiers; analogue-digital conversion; RAMP; SNDR; analog coarse correction phase; background amplifier offset calibration; digital fine correction phase; high-resolution pipelined ADC; residue amplifier; Calibration; Capacitors; Choppers; Converters; Mathematical model; Noise; Simulation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
NEWCAS Conference (NEWCAS), 2010 8th IEEE International
Conference_Location :
Montreal, QC
Print_ISBN :
978-1-4244-6806-5
Electronic_ISBN :
978-1-4244-6804-1
Type :
conf
DOI :
10.1109/NEWCAS.2010.5603728
Filename :
5603728
Link To Document :
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