A 900 MHz CMOS balanced harmonic mixer for direct conversion receivers

Author

Zhang, Zhaofeng ; Chen, Zhiheng ; Lau, Jack

Author_Institution

Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., Kowloon, China

fYear

2000

fDate

2000

Firstpage

219

Lastpage

222

Abstract

A 900 MHz balanced harmonic mixer for direct conversion receivers is fabricated in a 0.35 μm standard digital CMOS process. The self-mixing-induced DC offset is about 44 dB lower than that of the conventional mixer. The input referred offset is reduced to the noise level. Specific techniques on flicker noise reduction are also discussed. At 3 V power supply and -15.4 dBm LO power, it achieves 13 dB conversion gain, 24.5 dB noise figure at 10 kHz, -10 dBm third-order input intercept point and +36 dBm second-order input intercept point. The total power consumption is about 5 mW

Keywords

CMOS analogue integrated circuits; UHF integrated circuits; UHF mixers; flicker noise; integrated circuit noise; radio receivers; 0.35 micron; 13 dB; 24.5 dB; 3 V; 5 mW; 900 MHz; CMOS balanced harmonic mixer; DC offset; conversion gain; direct conversion receiver; flicker noise; noise figure; power consumption; second-order input intercept point; self-mixing; single chip radio; third-order input intercept point; 1f noise; CMOS process; CMOS technology; DC generators; Lifting equipment; Noise level; Power harmonic filters; RF signals; Radio frequency; Reflector antennas;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio and Wireless Conference, 2000. RAWCON 2000. 2000 IEEE

Conference_Location

Denver, CO

Print_ISBN

0-7803-6267-5

Type

conf

DOI

10.1109/RAWCON.2000.881894

Filename

881894