DocumentCode
2598430
Title
Bump non-wet issue in large-die flip chip package with eutectic Sn/Pb solder bump and SOP substrate pad
Author
Xiong, Z.P. ; Sze, Ho Pei ; Chua, K.H.
Author_Institution
Agere Syst. Singapore Pte. Ltd.
fYear
2004
fDate
8-10 Dec. 2004
Firstpage
438
Lastpage
443
Abstract
This paper describes a study on non-wet issue encountered in flip chip assembly process of high-density flip chip ball grid array (FCBGA) packages with eutectic Sn/Pb solder interconnects. A nonwet occurrence is more obvious in large-die flip chip (die size >16mm) with high I/O counts (>1000). Thermal-mechanical mismatch between die and substrate shows a role in affecting soldering condition of the die solder bump and substrate SOP. Positive evaluation results, involving: 1) new flux material with increased percentage of solid content or modified activator and 2) plasma treatment on substrate prior to FC assembly, indicate that a more effective approach is needed to improve bump solderability in large die flip chip devices
Keywords
ball grid arrays; flip-chip devices; integrated circuit interconnections; integrated circuit packaging; lead alloys; solders; tin alloys; I/O counts; SOP substrate pad; SnPb; bump solderability; eutectic solder bump; eutectic solder interconnects; flip chip assembly; flip chip ball grid array packages; flux material; large-die flip chip package; nonwet occurrence; plasma treatment; thermal-mechanical mismatch; Assembly; Atherosclerosis; Flip chip; Integrated circuit interconnections; Packaging; Plasma applications; Plasma chemistry; Soldering; Surface cleaning; Tin;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Packaging Technology Conference, 2004. EPTC 2004. Proceedings of 6th
Conference_Location
Singapore
Print_ISBN
0-7803-8821-6
Type
conf
DOI
10.1109/EPTC.2004.1396648
Filename
1396648
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