3.6 GHz highly monotonic digitally controlled oscillator for all-digital phase locked loop

Summary form only given, as follows. An analytical method to make a trade-off between the tuning range and differential non-linearity (DNL) for a digitally controlled oscillator (DCO) is proposed. To verify the approach, a 12-bit DCO is designed, implemented in 0.18 um CMOS technology, and tested. The measured DNL was −0.41 Least Significant Bit (LSB). The measured phase noise was −135.2 dBc/Hz (@ 4 MHz offset) at an oscillation frequency of 3.6 GHz and with 19.2 mW power consumption.