Title :
Efficient symbolic support manipulation
Author_Institution :
IMEC Lab., Leuven, Belgium
Abstract :
An incompletely specified function can be given by an interval (g, h) or alternatively by a function f and a don´t care set d. Depending on the assignment of don´t cares, a different compatible function with a possibly support set may be derived. In this paper, efficient symbolic algorithms based on BDDs are presented for finding a compatible function with the minimum support. Efficient solution to this problem has important application in FPGA synthesis
Keywords :
field programmable gate arrays; logic CAD; logic design; symbol manipulation; BDDs; FPGA synthesis; compatible function; incompletely specified function; symbolic algorithms; symbolic support manipulation; Binary decision diagrams; Boolean functions; Costs; Data structures; Delay; Dynamic programming; Field programmable gate arrays; Laboratories; Network synthesis; Table lookup;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1993. ICCD '93. Proceedings., 1993 IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-4230-0
DOI :
10.1109/ICCD.1993.393324
