Title :
A field programmable accelerator for compiled-code applications
Author :
Lewis, David M. ; Van Ierssel, Marcus H. ; Wong, Daniel H.
Author_Institution :
Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada
Abstract :
Describes a special-purpose application accelerator using field-programmable gate arrays to accelerate a range of applications. The accelerator is designed to support applications by allowing the user to implement a processor with an instruction set designed for the specific application being accelerated, using specialized instructions to implement critical fragments of the application. A compiled-code software organization is used to reduce overhead operations. A prototype has been built, and the first application to be ported to it, logic simulation, is underway
Keywords :
circuit analysis computing; field programmable gate arrays; instruction sets; logic CAD; program compilers; programmable logic arrays; FPGA; compiled-code applications; compiled-code software organization; critical fragments; field-programmable gate arrays; instruction set; logic simulation; overhead operations; special-purpose application accelerator; specialized instructions; Acceleration; Application software; Circuit simulation; Field programmable gate arrays; Hardware; Logic circuits; Parallel processing; Reconfigurable logic; Software prototyping; Virtual prototyping;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1993. ICCD '93. Proceedings., 1993 IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-4230-0
DOI :
10.1109/ICCD.1993.393327
