Title :
Neighbour state transition method for VLSI optimization problems
Author :
Zhou, D. ; Tsui, F.
Author_Institution :
EE Dept., Univ. of North Carolina, Charlotte, NC, USA
Abstract :
A novel technique, called the neighbor state transition method, is introduced for solving a class of optimization problems often found in VLSI designs. The method utilizes the powerful means that have been developed for optimization in continuous space in order to solve optimization problems confined to discrete points. For two NP-hard problems, gate array placement and graph partitioning, the method produces an asymptotically global optimal solution in polynomial time
Keywords :
VLSI; circuit layout; circuit optimisation; computational complexity; graph theory; logic gates; state-space methods; NP-hard problems; VLSI optimization problems; asymptotically global optimal solution; continuous space; discrete points; gate array placement; graph partitioning; neighbor state transition method; polynomial time; Cost function; Design automation; Design engineering; Heuristic algorithms; Optical design; Optimization methods; Partitioning algorithms; Polynomials; Space exploration; Very large scale integration;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1993. ICCD '93. Proceedings., 1993 IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-4230-0
DOI :
10.1109/ICCD.1993.393330
