Title :
Modeling and design of a low-power injection-locked frequency divider in 90nm CMOS for 60GHz applications
Author :
Katz, Alex ; Degani, Ofir ; Socher, Eran
Author_Institution :
Mobile Wireless Div., Intel Corp., Haifa, Israel
Abstract :
This paper describes the modeling and design considerations of a low-power divide-by-two injection-locked frequency divider (ILFD) for 60GHz frequency synthesizer applications implemented in 90nm CMOS process. The paper proposes a divider´s locking range model based on mixing analysis. The design uses a capacitor bank for the divider band selection and tail current injection. Measured results of the designed divider show minimum power consumption of 1.32mW and locking range 2.5GHz at an input power of 2dBm.
Keywords :
CMOS integrated circuits; capacitors; frequency dividers; frequency synthesizers; low-power electronics; CMOS process; capacitor bank; divider band selection; divider locking range model; frequency 2.5 GHz; frequency 60 GHz; frequency synthesizer application; low-power divide-by-two injection-locked frequency divider; mixing analysis; power 1.32 mW; power consumption; size 90 nm; tail current injection; CMOS integrated circuits; Capacitors; Frequency conversion; MOSFETs; Oscillators; Power demand; Semiconductor device modeling; CMOS; injection-locked frequency divider (ILFD); locking range;
Conference_Titel :
Silicon Monolithic Integrated Circuits in RF Systems (SiRF), 2011 IEEE 11th Topical Meeting on
Conference_Location :
Phoenix, AZ
Print_ISBN :
978-1-4244-8060-9
DOI :
10.1109/SIRF.2011.5719315
