Title :
Strongly NP-hard discrete gate sizing problems
Author_Institution :
Dept. of Comput. Sci., Arkansas Univ., Fayetteville, AR, USA
Abstract :
The discrete gate sizing problem has been studied by several researchers recently. Some complexity results have been obtained, and a number of heuristic algorithms have been proposed. For circuit networks that are restricted to the set of trees, or series-parallel graphs, pseudo-polynomial time algorithms to obtain the exact solution have also been proposed, through none can be extended to arbitrary DAGs (directed acyclic graphs). We prove that the problem is strongly NP-hard. Our results implies that for arbitrary DAGs there is no pseudo-polynomial time algorithm to obtain the exact solution unless P=NP. Our result also provides insight into the difficulties of the problem, and may lead to better heuristics
Keywords :
circuit layout; computational complexity; directed graphs; heuristic programming; logic design; logic gates; trees (mathematics); circuit networks; complexity; directed acyclic graphs; discrete gate sizing problem; heuristic algorithms; pseudo-polynomial time algorithms; series-parallel graphs; strongly NP-hard problem; trees; Circuits; Computer science; Delay effects; Design optimization; Graph theory; Heuristic algorithms; Libraries; Network topology; Timing; Tree graphs;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1993. ICCD '93. Proceedings., 1993 IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-4230-0
DOI :
10.1109/ICCD.1993.393332