Title :
Digitally controlled ring oscillator using fraction-based series optimization for inductorless reconfigurable all-digital PLL
Author :
Pokharel, Ramesh K. ; Hamada, Satoshi ; Tomar, Abhishek ; Lingala, Shashank ; Nugroho, Prapto ; Kanaya, Haruichi ; Yoshida, Keiji
Author_Institution :
Center for Japan-Egypt Cooperation in Sci. & Technol., Kyushu Univ., Fukuoka, Japan
Abstract :
Design and implementation of a CMOS multiphase 10b digitally controlled oscillator (DCO) in ring topology that employs fraction-based series to optimize the transistors size, are presented. One of the advantages of using fraction-based series is that it can reduce the power consumption compared to the binary series without any cost of tuning range and phase noise. The proposed DCO, which was implemented on 0.18 μm CMOS technology, features the tuning frequency 600 MHz to 4.27 GHz with power consumption from 10 mW-40 mW. The measured phase noise is -114.7 dBc/Hz (@4 MHz offset) of the carrier frequency 2.75 GHz.
Keywords :
CMOS integrated circuits; UHF oscillators; digital phase locked loops; field effect MIMIC; microwave oscillators; phase noise; CMOS multiphase; CMOS technology; digitally controlled oscillator; fraction-based series optimization; frequency 600 MHz to 4.27 GHz; phase noise; power 10 mW to 40 mW; reconfigurable all-digital PLL; ring oscillator; CMOS integrated circuits; Delay; Frequency measurement; Phase noise; Ring oscillators; Transistors; Tuning; Digitally controlled ring oscillator; figure of merit; fraction-based series; multiphase clock generation; phase noise;
Conference_Titel :
Silicon Monolithic Integrated Circuits in RF Systems (SiRF), 2011 IEEE 11th Topical Meeting on
Conference_Location :
Phoenix, AZ
Print_ISBN :
978-1-4244-8060-9
DOI :
10.1109/SIRF.2011.5719321
