Title :
Effect of gate oxide scaling on RF performance of SOI MOSFETs
Author :
Emam, M. ; Vanhoenacker-Janvier, D. ; Raskin, J. -P
Author_Institution :
Electr. Eng. Dept., Univ. Catholique de Louvain, Louvain-la-Neuve, Belgium
Abstract :
Although scaling down the dimensions of transistors is a main requirement for digital applications, it could be problematic for RF applications. This paper shows the importance of relaxing the scaling rules for the gate oxide thickness in order to optimize the benefits of scaling.
Keywords :
MOSFET; silicon-on-insulator; MOSFET; RF performance; SOI; digital applications; gate oxide scaling; Capacitance; Doping; Logic gates; MOSFETs; Performance evaluation; Radio frequency; Gate Oxide thickness; Low Voltage Low Power; MOSFET; Partially-Depleted Silicon-on-Insulator technology; RF characterization; Scaling; analog;
Conference_Titel :
Silicon Monolithic Integrated Circuits in RF Systems (SiRF), 2011 IEEE 11th Topical Meeting on
Conference_Location :
Phoenix, AZ
Print_ISBN :
978-1-4244-8060-9
DOI :
10.1109/SIRF.2011.5719322
