DocumentCode
2599143
Title
Investigation of Surface Breakdown by Light Scanning
Author
Hooper, W.W. ; Schroen, W.
Author_Institution
Shockley Research Laboratory, Clevite Corporation, Semiconductor Division., Palo Alto, California
fYear
1964
fDate
Sept. 1964
Firstpage
433
Lastpage
451
Abstract
EXPERIMENTAL investigations of surface breakdown in planar p-n junctions utilizing the technique of photoscanning are reported. A reduction in device breakdown voltage upon illumination of small areas of the oxide layer close to the p-n junction has been observed. The results suggest conclusions about failure mechanisms in oxide covered silicon p-n junctions and possible methods to prevent them. A model is presented which describes the variation of the break-down voltage by dividing the space charge layer near the interface into two regions: an ionization region containing a high electric field, and a trapping region. It is assumed that the electrons generated by the illumination change the charge state of the traps in such a way that the electric field within the ionization region is increased. The nature of the traps is not known, but further investigations are planned to elucidate details of the model.
Keywords
Avalanche breakdown; Breakdown voltage; Electric breakdown; Electron traps; Germanium alloys; Laboratories; P-n junctions; Semiconductor device breakdown; Silicon; Surface treatment;
fLanguage
English
Publisher
ieee
Conference_Titel
Physics of Failure in Electronics, 1964. Third Annual Symposium on the
Conference_Location
Chicago, IL, USA
ISSN
0097-2088
Type
conf
DOI
10.1109/IRPS.1964.362304
Filename
4207658
Link To Document