Title :
Fault injection for verifying testability at the VHDL level
Author :
Seward, S.R. ; Lala, P.K.
Author_Institution :
University of Arkansas
fDate :
Sept. 30-Oct. 2, 2003
Keywords :
Circuit faults; Circuit simulation; Circuit testing; Computer science; Design engineering; Digital circuits; Digital systems; Logic circuits; Logic testing; System testing;
Conference_Titel :
Test Conference, 2003. Proceedings. ITC 2003. International
Print_ISBN :
0-7803-8106-8
DOI :
10.1109/TEST.2003.1270833
