Title :
Emitter CMP process optimization for self-aligned SiGe:C HBT fabrication
Author :
Knoll, D. ; Ma, H. ; Barth, R. ; Drews, J. ; Fox, A. ; Heinemann, B. ; Wolff, A.
Author_Institution :
IHP, Frankfurt (Oder), Germany
Abstract :
Using Si/SiGe CMP in the emitter module of SiGe:C HBT fabrication is an innovative approach in two respects. First, it allows one to simplify the fabrication process, enabling real low-cost HBT modules. Second, it can also be applied to form a fully self-aligned HBT structure, enabling highest RF performance. In this paper, we focus on CMP process optimization. We will show that a previous disadvantage of emitter CMP, base current relevant emitter thinning that differs with changing emitter size can be overcome by using a new, improved CMP regime. In result, previous design restrictions, introduced to maintain HBT base current scalability, can widely be relaxed. We will also demonstrate the role of a careful post-CMP cleaning procedure with respect to device and circuit yield.
Keywords :
Ge-Si alloys; carbon; chemical mechanical polishing; circuit optimisation; heterojunction bipolar transistors; integrated circuit yield; silicon; CMP process optimization; Si-SiGe; SiGe:C; chemical-mechanical polishing; circuit yield; current scalability; emitter module; self-aligned HBT fabrication; self-aligned HBT structure; BiCMOS integrated circuits; Cleaning; Heterojunction bipolar transistors; Optimization; Silicon; Silicon germanium; BiCMOS; CMP; Silicon Germanium; device yield; emitter; heterojunction bipolar transistor;
Conference_Titel :
Silicon Monolithic Integrated Circuits in RF Systems (SiRF), 2011 IEEE 11th Topical Meeting on
Conference_Location :
Phoenix, AZ
Print_ISBN :
978-1-4244-8060-9
DOI :
10.1109/SIRF.2011.5719334
